The POWER4 Processor Introduction and Tuning Guide

An IBM Redbooks publication

Note: This is publication is now archived. For reference only.

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Published on November 29, 2001

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ISBN-10: 0738423556
ISBN-13: 9780738423555
IBM Form #: SG24-7041-00


Authors: Scott Vetter, Stephen Behling, Peter Farrell, Holger Holthoff, Frank O'Connell and Will Weir

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    Abstract

    This IBM Redbooks publication is designed to familiarize you with the IBM eServer pSeries POWER4 microarchitecture and to provide you with the information necessary to exploit the new high-end servers based on this architecture.

    The eight to 32-way symmetric multiprocessing (SMP) pSeries 690 Model 681 will be the first POWER4 system to be available. Thus, most analysis presented in this publication refers to this system.

    Specifically, this publication will address the following issues:

    POWER4 features and capabilities

    Processor and memory optimization techniques, especially for Fortran programming

    AIX XL Fortran Version 7.1.1 compiler capabilities and which options to use

    Parallel processing techniques and performance

    Available libraries and programming interfaces

    Performance examples of commonly used kernels

    While this publication is decidedly technical in nature, the fundamental concepts are presented from a user point of view and numerous examples are provided to reinforce these concepts.

    Table of Contents

    Chapter 1. Processor evolution

    Chapter 2. The POWER4 system

    Chapter 3. POWER4 system performance and tuning

    Chapter 4. Optimizing with the compilers

    Chapter 5. General tuning guidelines

    Chapter 6. Performance libraries

    Chapter 7. Parallel programming techniques and performance

    Chapter 8. Application performance and throughput

     

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