Architecture of the IBM POWER7+ Technology-Based IBM Power 750 and IBM Power 760

Abstract

This IBM® Redbooks® technote describes the processor to memory architectural differences between IBM POWER7® technology-based IBM Power 750 (8233-E8B) and the IBM POWER7+™ technology-based Power 750 (8408-E8D) and Power 760 (9109-RMD) servers. Historically new server models within a model family (such as Power 710) have carried forward a similar, though enhanced, memory and I/O architecture of their previous model. However, this case is not the same for POWER7+ Power 750 and Power 760. With these new server models, changes to the bus architecture might require additional performance considerations for partitions that need processor and memory resources that span multiple processor sockets.

For related information about this topic, refer to the following IBM Redbooks publication:
IBM Power 750 and 760 Technical Overview and Introduction, REDP-4985-00

Contents


This IBM® Redbooks® technote describes the processor to memory architectural differences between IBM POWER7® technology-based IBM Power 750 (8233-E8B) and the IBM POWER7+™ technology-based Power 750 (8408-E8D) and Power 760 (9109-RMD) servers. Historically new server models within a model family (such as Power 710) have carried forward a similar, though enhanced, memory and I/O architecture of their previous model. However, this case is not the same for POWER7+ Power 750 and Power 760. With these new server models, changes to the bus architecture might require additional performance considerations for partitions that need processor and memory resources that span multiple processor sockets.

The Power 750 (8408-E8D) with its new POWER7+ processors provides scalability up to 32 cores and 1 TB of memory. The Power 760 (9109-RMD) uses the same architecture and form factor as the 8408-E8D. However, the Power 760 provides processor scaling of up to 48 cores and 2 TB of memory, along with additional capabilities.

Similar to its previous POWER7 version, the POWER7+ technology-based Power 750 design still provides 32 cores across 4 processor sockets, but the system design delivers a new architecture. The Power 750 (8404-E8D) and Power 760 systems introduce a two-tier interconnect architecture for a 4-socket system design. With this implementation, the socket and node are logically the same. For the Power 770, the system enclosure and the node are logically the same. For the Power 795, the book and node are logically the same. One tier is for intra-node communication, and the second tier is for inter-node communication. This two-tier interconnect enables more cores and greater throughput.

The previous POWER7 technology-based Power 750 (8233-E8B) uses a single node design. It was available as a 4-socket system with one POWER7 chip per socket and W-Y-Z buses between sockets, as shown in Figure 1. A 6-core or 8-core POWER7 chip was orderable.

Intra-node buses
Figure 1. Intra-node buses

The POWER7+ technology-based Power 750 (8408-E8D) and Power 760 use a multiple node design, with two POWER7+ chips per socket delivered in a dual chip module (DCM) package. The Power 750 (8408-E8D) can be ordered with a 4-core chip and the Power 760 can be ordered with a 6-core chip. The two POWER7+ chips within the DCM communicate using the Y-Z bus architecture that was previously deployed between sockets in the POWER7 technology-based Power 750 (8233-E8B). However, communications between DCMs from socket to socket use AB buses as illustrated in Figure 2.

Inter-node buses
Figure 2. Inter-node buses

From a topology standpoint, the new Power 750 (8408-E8D) and Power 760 (9109-RMD) systems are similar to the 4-drawer Power 770 and Power 780 systems. In this case, the interconnects between chips in a DCM of a Power 750 (8408-E8D) and Power 760 (9109-RMD) server are similar to the interconnects between sockets in a single Power 770 or Power 780 system enclosure. Similarly, the interconnects between DCMs in the four sockets of the Power 750 (8408-E8D) and Power 760 (9109-RMD) system are similar to the interconnects between the system enclosures of a Power 770 or Power 780.

This architecture provides the best bandwidth and lowest latency between the chips within a DCM or socket (node) and a lower bandwidth and higher latency between DCMs or sockets (nodes). Therefore, when configuring workloads that span the DCM or socket (node) boundaries within a Power 750 (8408-E8D) and Power 760 (9109-RMD), take the same considerations into account as when deploying workloads that span multiple system enclosures on a Power 770 or Power 780 server to achieve optimum performance.

The memory bandwidth for Power 750 (8408-E8D) is the same per core as the previous Power 750 (8233-E8B). The Power 760 has 50% more processor capacity with the same memory bandwidth. The larger L3 cache delivered on the POWER7+ mitigates the higher memory bandwidth demand of this additional capacity. In addition, faster core speeds are available that enhance on-core throughput.

When sizing a system, consider the following points:
  • Size the system to accommodate peaks in the shared processor pool. One way to accommodate the peaks is to increase the processor capacity by 20%.
  • Use the IBM Systems Workload Estimator for all sizing considerations. For more information about the IBM Systems Workload Estimator, go to:
    http://www.ibm.com/systems/support/tools/estimator
  • Populate dual inline memory module (DIMMs) behind all sockets (chip), which are enforced by the configurator.
  • Consider the partition entitlement where minimum entitlement (desired) should be the average processor usage. A normal workload should run with entitled processor cycles.

When configuring the POWER7+ 750 and Power 760, consider the practices that are highlighted in the following sections.


System unit level considerations

Consider the following tips at the system unit level:
  • Ensure the current firmware level is at FW 770.
  • Check the partition placement:


Operating system application considerations

Consider the following tips at the system application level:


Additional information

For additional information, see the following IBM Redbooks publications:

Special Notices

This material has not been submitted to any formal IBM test and is published AS IS. It has not been the subject of rigorous review. IBM assumes no responsibility for its accuracy or completeness. The use of this information or the implementation of any of these techniques is a client responsibility and depends upon the client's ability to evaluate and integrate them into the client's operational environment. publib-b.boulder.ibm.com

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Publish Date
04 February 2013

Last Update
13 February 2013


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