The announcement of POWER3-based Thin and Wide nodes in early 1999, along with the addition of High nodes this fall, positions the RS/6000 SP with a new and powerful offering for the scientific and technical community.
This IBM Redbooks publication provides a description of the POWER3 SMP architecture exploited by the new POWER3-based nodes and performance information for standard benchmarks, such as LINPACK, NAS 2, and Spec95.
This book offers hints and tips as well as sample code for various aspects of parallel programming on POWER3 SMP architectures. Discussions of distributed memory, threads, MPI, OpenMP, LAPI, and several other facilities for developing parallel applications will help the reader understand and use these tools and take advantage of the parallel nature of the RS/6000 SP empowered by these new nodes.
Due to the technical nature of the book, it will be most valuable to readers with some background in parallel computing who are familiar with SMP and parallel architectures.
Table of contents
Chapter 1. Introduction
Chapter 2. Performance
Chapter 3. Distributed memory
Chapter 4. Shared memory
Chapter 5. Hybrid programming model
Chapter 6. Input/output
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