Performance Optimization and Tuning Techniques for IBM Processors, including IBM POWER8

Readers' comments

Readers' comments (3) 



Posted by Chi Hui Chen on 8 May 2014 at 8:53

The code logic of Example 6-8 is incorrect:
"if (__TM_begin (TM_buff))" should be "if (__TM_begin (TM_buff) == 0)", since __TM_begin return value 0 means transaction successfully begin.
non-zero value means transaction failed.


Example 6-8 Complex HTM usage using portable HTM intrinsics
while (1)
{
if (__TM_begin (TM_buff))
{
/* Transaction State Initiated. */
if (is_locked (lock))
__TM_abort ();
a = b + c;
__TM_end ();
break;
}
else
{
/* Transaction State Failed. Use locks if the transaction

Posted by Karen Lawrence on 9 May 2014 at 9:20

We will follow up on this for you. Thank you for your comment.

Posted by Dr. Peter Bergner on 12 May 2014 at 9:51

The example in the document is correct. The HTM builtins and intrinsic functions were all designed to return non-zero values on success and zero otherwise.

I think your confusion is due to the .tbegin hardware instruction setting of CR0's Zero/EQ bit on transaction failure. Buitins and other functions can only return values via normal "types" and no type maps directly to CR registers, we had to synthesize a normal source level return value from CR0's Zero/EQ bit and non-zero means success.


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Publish Date
11 July 2014

Last Update
24 November 2014


Rating:
(based on 1 review)


Author(s)

ISBN-10
073843972X

IBM Form Number
SG24-8171-00